Debugging GNU make
Is there a command line way in make to find out which of the prerequisites of a target is not updated?
should give you more than enough information to debug your makefile.
Be warned: it will take some time and effort to analyze the output but loading the output into your favorite editor and doing searches will assist a lot.
You can greatly reduce the amount of debugging output if you specify the specific target you're interested in. So if you're only interested in the dodgy target, instead of just make -d which may make a hundred different things, try:
make clean make -d dodgy
(assuming you have a clean target of course).
The make --debug is identical to make -d but you can also specify:
where flags can be:
- a for all debugging (same as make -d and make --debug).
- b for basic debugging.
- v for slightly more verbose basic debugging.
- i for implicit rules.
- j for invocation information.
- m for information during makefile remakes.
It looks like make --debug=b is the best option for what you need, as shown in the following transcript:
pax@paxbox> cat makefile c:a b touch c pax@paxbox> touch a b ; make touch c pax@paxbox> make make: 'c' is up to date. pax@paxbox> touch a ; make --debug=b GNU Make 3.81 Copyright (C) 2006 Free Software Foundation, Inc. Blah, blah, blah. Reading makefiles... Updating goal targets.... Prerequisite 'a' is newer than target 'c'. Must remake target 'c'. touch c Successfully remade target file 'c'.
Are you looking for Make's "dry run"? It will print out what make is doing without actually doing so, allowing you to see what happens.
The flag is -n, use it like make -n.
There's also GNU make with a debugger and better trace/error output: Remake
Your question is a little unclear. If you want to see which prerequisite files have not been modified recently, use ls -l to see their modification time. If you want to see what make is doing, try this:
# Make will announce when it is making this target, and why. sometarget: preq1 preq2 preq3 @echo making $@ @echo The following preqs are newer than the target: $? do_things
What I usually do is not go using -d as previous answerers said.
- Use -p to print the database, to see what rules have been created. This is handy if you have second expansion rules and are creating rules on the fly, especially recursive make.
- Heavy use of $(info) function.
- Use the tips and trick described in this DrDobbs article Debugging Makefiles
Below is some code I'm using for printing out values:
define pv $(info $(1) [$(origin $(1))] : >|$($(1))|<) endef define pva $(foreach t,$(1),$(call pv,$(t))) endef define itemizer $(foreach t,$($(1)),$(info $(t))) endef
Few times I've also used this (old but still working) interactive make debugger by John Graham-Cumming
i am using make gnu make templates to define the make rules per target;
Templates are like macros that write rules, they are explained here https://www.gnu.org/software/make/manual/html_node/Eval-Function.html
this feature is useful when you have a make system that includes a core makefile to generate all rules per project type; if it says to do a shared library then it writes the rules to compile a shared library; etc. for other types of targets.
in this example: if you add SHOW_RULES=1 to the make command line it also shows the text of the rules that are generated by the PROGRAM_target_setup_template ; along with generating the rules themselves (with eval).
# this one defines the target for real $(foreach prog, $(TARGETS), $(eval $(call PROGRAM_target_setup_template,$(prog)))) ifneq "$(SHOW_RULES)" "" $(foreach prog, $(TARGETS), $(info $(call PROGRAM_target_setup_template,$(prog)))) endif
- $(call ... ) invokes the template
- $(info ... ) prints the result of template substitution; ( eval would have invoked parsing of the output and addition to the current make file )
More about my make files here: http://mosermichael.github.io/cstuff/all/projects/2011/06/17/make-system.html